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NEW QUESTION: 1
Which will guarantee that a zonemap is generated for the NAME column?
A. CREATE TABLE customer (name VARCHAR(20));
B. CREATE TABLE customer (name VARCHAR(20)) DISTRIBUTE ON (name);
C. CREATE TABLE customer (name VARCHAR(20)); ALTER TABLE customer ZONEMAP ON (name);
D. CREATE TABLE customer (name VARCHAR(20));
CREATE MATERIALIZED VIEW custview AS SELECT * FROM customer ORDER BY name;
Answer: B
NEW QUESTION: 2
A CGI application on the company's Web server has a bug written into it. This particular bug allows the application to write data into an area of memory that has not been properly allocated to the application. An attacker has created an application that takes advantage of this bug to obtain credit card information.
Which of the following security threats is the attacker exploiting, and what can be done to solve the problem?
A. - Man-in-the-middle attack
- Contact the company auditor
B. - Buffer overflow
- Work with the Web developer to solve the problem
C. - SQL injection
- Work with a database administrator to solve the problem
D. - Denial of service
- Contact the organization that wrote the code for the Web server
Answer: B
NEW QUESTION: 3
What is the name of the core-to-core transport mechanism used in Intel XEON processors?
A. Crossbar switch
B. Hyper Transport
C. Northbridge
D. Quick Path Interconnect
Answer: D
Explanation:
The way I understand it, Crossbar is not a technology name, but a switch that assist in communication between processors, memory etc, allowing inter core & inter CPU communication. QPI, FSB & HT are all types of connections, connected to crossbar switches. All the answers are connected to crossbards, but only Intel has QPI. I would still go with QPI
www.site.uottawa.ca/~mbolic/ceg4131/Report Crossbar switches.pdf
A. Intel Xeon 7500 architecture The Intel Xeon 7500 series processor architectures uses an 8 port crossbar switch which implements the Intel QuickPath Interconnect (QPI) and routing layers. The Intel QPI is point-point interconnection link developed by Intel [1] to compete with HyperTransport. Prior to using QPI the Intel architecture was using the Front Side Bus (FSB) [2] which was the bus that carried data between CPU and the memory controller (northbridge) and I/O controller(southbridge).
The off-chip single memory controller often was the bottleneck which prevented faster CPUs from improving the overall performance of the system. Now, with crossbar implementation the microprocessor were able to integrate the northbridge on-chip for faster access As well: (Thanx MaaShar from Belgium)
http://www.intel.com/content/www/us/en/io/quickpath-technology/quickpath-technology- general.html
Intel@ QuickPath Technology uses Intel@ QuickPath Interconnect, which provides high-speed, point-to-point links inside and outside of the processor. In contrast to parallel buses, these links speed up data transfers by connecting distributed shared memory, the internal cores, the I/O hub, and other Intel@ processors.